Circuit Semantics' New Software Release Improves Accuracy, Performance and Automation
Core Technology Enhancements Apply to Entire Tool Suite
SAN JOSE, Calif.--(BUSINESS WIRE)--Dec. 13, 2001--Circuit
Semantics(TM), Inc., the leading provider of timing and
characterization solutions for high-performance IC design, today
announced the release of the 2001 version of DynaCore(TM),
DynaCell(TM), and DynaModel(TM) and the release of DynaTest(TM), an
option to DynaModel. Significant enhancements have been made to the
core technology underlying all CSI tools resulting in greater
accuracy, performance and automation. An optional TCL based API
interface has been added to allow users to manipulate and access
design, timing characterization and analysis data. By using the API,
users can customize the tools and integrate them tightly into their
design and verification flow. Further, this new release offers full
support for Berkeley SPICE BSIM4.2 models in addition to the
BerkeleyBSIM3 models currently supported.
"With the ever-increasing scale of designs, design engineers need
high-performance, customizable tools that can manipulate all design
data," said Gary Larsen, president and CEO of Circuit Semantics. "This
major upgrade of our core technology has made it easier for our
customers to access characterization, analysis and timing data to meet
their specific requirements. This improves individual flows that
results in a further reduction in design cycle times."
A key enhancement to DynaCore is an incremental option that
utilizes a persistent database. The incremental option dramatically
reduces ECO turn around time. Depending upon the extent of the design
changes, users can obtain a significant throughput improvement
translating directly into shorter design cycles. In addition, the
automatic characterization algorithm in DynaCore has been enhanced to
cover a wider range of high speed design styles, especially in the
case of sequential and dynamic circuits.
Enhancements to DynaCell include the ability to characterize
multiple voltage I/O pads and the capability to automatically validate
the models written out by DynaCell and automatic generation of Vital
views. Power characterization now includes state dependent leakage
power and "hidden" or "quiet power" characterization thus providing
designers with a comprehensive solution for their power analysis.
DynaTest, a new option to DynaModel, is now available as part of
the expanding CSI tool suite. The DynaTest option allows users to
write out Verilog ATPG gate-level models of the full custom
transistor-level design. DynaTest is the first tool to achieve
dramatic reductions in the time required to model custom
transistor-level design for ATPG tools. It not only reduces the time
required, it increases test coverage and accuracy thus saving
non-recurring engineering costs. When coupled with Mentor's
FastScan(TM), DynaTest shortens the test design process from
person-years to person-days.
About Circuit Semantics
Circuit Semantics, Inc. provides timing and characterization
solutions for high performance cells, cores, and blocks based on
innovative technology for which patents are currently pending. IC
designers employ these mixed-level solutions to create
high-performance chips using full-custom and structured-custom
methodologies. The company's products support precise, gate-level
abstraction of transistor-level circuits to accelerate timing closure
for designs fabricated in deep submicron (DSM) process technologies.
These solutions are especially well suited for the microprocessor,
digital signal processing, graphics and the high-speed communications
markets. Circuit Semantics is headquartered at 2590 North First
Street, Suite 301, San Jose, Calif. 95131, telephone 408/571-4800; fax
408/468-1468. For more information, visit www.circuitsemantics.com.
Note to Editors: FastScan is a trademark of Mentor Graphics.
DynaCore, DynaCell, DynaTest and DynaModel are trademarks of Circuit
Semantics, Inc.
Contact:
Circuit Semantics, San Jose
Arnie Becker, 408/571-4815
arnie.becker@circuitsemantics.com
